Newman College
Year 12 Information Systems - E238
RISC vs CISC
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Newman College
Year 12 Information Systems - E238 RISC vs CISC |
Check out what is said on Wikipedia as well. http://en.wikipedia.org/wiki/Complex_instruction_set_computer and http://en.wikipedia.org/wiki/Reduced_instruction_set_computer
Some of the content here is opinion and may not be factually correct. (Mike Leishman)
By Ken Hopkins (Dec)
This topic is a bit of a furphy really. The great debate about Reduced Instruction Set Chips (or Computers) and Complex Instruction Set Chips (or Computers) is really irrelevant these days. They really are just two design approaches to chips that were common in the late 1970s and 1980s. The driving force toward either of these design approaches has largely gone. Most chips and therefore the computers that are run by them have always fallen in between the two extremes anyway.
Complex Simple
CISC____________________________________________________________RISC
4-bit |
| 4004
| 4040
8-bit | 6800 6502
| 8008
| Z8
| 8080
| Z-80 6809
16-bit| Z-280 PDP11
| 8086 TMS9900
| Z8000 65816
| 32016 68000 HOBBIT
32-bit| 68020 ARM
| 80486 68040
| Z80000 TRON48 PA-RISC
| Pentium
64-bit|Rekurs PowerPC CDC6600 R4000
| Alpha
| Pentium III G3
| Pentium IV G4
Manufacturers
Acorn: ARM
CDC: Control Data Corporation [Manufactures of super-computers.]
DEC: PDP-11
Intel: 4004, 8008, 8086, 80486, Pentium, Pentium III, Pentium IV
Motorola: 6502, 6800, 68000, 68020, 68040, PowerPC, G3, G4
Texas Instruments: TMS9900
Zilog: Z8, Z-80, Z-280, Z-8000, Z80000
The RISC movement was an attempt to speed up computing in the days (late 1970s and 1980s) when “code bloat” [programs getting too big for the hardware] was becoming a problem and slowing down the execution of programs. These days we do not worry so much about it, as people who have installed various successive versions of programs (such the Windows OS) will know. The hardware can take the huge programs these days and still run relatively fast.
The idea of RISC was to reduce the number of instructions that a chip worked on, and to reduce the complexity of these instructions, to reduce it vocabulary of the chip if you like. That would mean that the simpler instructions could run faster, completing ideally in one clock cycle.
The chips up to then had been developing along the line of more complicated instructions that made high level programming simpler. These more complicated instructions took longer to complete, even though they made programming easier. They may take two, three of even more clock cycles to finish.
The result was that RISC chips ran code faster, and were cheaper to manufacture. In the very few cases that complex instructions were needed by a RISC processor, they could be made up from lots of simple ones. This is not very often, and so there is an overall gain.
The term CISC was invented as a convenient opposite of RISC; it was never really a design intention to make the chips more complex. The CISC design trend was an attempt to make every high level statement map onto one single chip instruction by the chip making have more instructions.
The Intel line of chips tends to be the CISC type. It is said Pentium II was the peak development of CISC. The Motorola line of chips tends to be more RISC. In reality neither is 100% in either category.
A RISC tends to have:
Few instructions
Instructions are the same size (e.g. all one byte) and in a fixed format.
Execution during a single cycle of a processor
Load / Store architecture (data is loaded into internal registers, manipulated, then stored not in RAM.)
It is perhaps important to remember that if a chip has few instructions it does not automatically qualify as a RISC chip.
A CISC tends to have
More instructions
Instructions are that are differing size (e.g. one, two, three and more bytes) and format. [This is important as it increases the overhead, the time taken to fetch all the data that is needed.]
Execution may not be completed on a single cycle of a processor.
Direct memory operations done in RAM rather than being moved to the processor first.
If a chip has many instructions it does not automatically qualify it as a CISC chip.
The key to understanding the speed increase given by simple instruction is that all instructions are broken down by the hardware before execution. They are broken down into mini-instructions called microcode.
Simpler instructions require less microcode and execute faster. If they complete in a single clock cycle they gain an advantage.
Complex instructions require more microcode and so take longer to execute. They frequently take more than one clock cycle to finish and so lose in comparison.
Many processors today do not use microcode, they are “hardwired”. Hardwiring and microcode can be considered opposites. Many RISC chips are hardwired today.
Pipelining has also changed the way processors operate, after one microcode instruction completes, another can often be done during same time, so several microcode instructions happen at the same time.
time/program = [ (instructions/program) x (cycles/instruction) x (time/cycle) ]
The above equation is a commonly used way of measuring a computer’s performance in running a program. Increasing performance means decreasing left side of the "=", because the less time it take to run a program, the better the machine’s performance.
A traditional CISC machine tries to reduce the amount of time it takes to run a program by reducing the first term to the right of the "=", that is the number of instructions per program.
A traditional RISC machine tries to reduce the amount of time it takes to run a program by reducing the middle term to the right of the "=", that is how many machine cycles an instruction takes.
The emphasis in modern chip design seems to be to concentrate on the third term on the right and make chips run faster. Together with the fact that most chips are neither totally RISC nor totally CISC makes the debate about RISC and CISC largely out of date.